Power management is an essential element for battery operated electronic devices. With the rising performance expectations on multimedia devices, it is important to implement low power techniques to have maximum performance with low battery utilization. Even though multiple parallel execution units increase the performance of the processor, power is wasted when some of the processing units are idle during various time intervals.
Various techniques have been implemented to optimize power. Since the power consumption of the processor is proportional to the frequency, reduction of the frequency of the system clock reduces the power consumption of the microprocessor.
There are some other means to implement this type of power optimization by increasing or decreasing voltage and frequency. But, it is done using dedicated hardware which can monitor and change voltage/frequency of a single processor at one time. This adds the extra cost of a dedicated hardware chipset, which is designed for this purpose. High performance has increased power consumption. What is desired is an embedded application to find the best trade-off between energy efficiency and performance by scaling CPU frequency and voltage levels.